ESP32-C61
Cost-effective 160 MHz RISC-V microcontroller with Wi-Fi 6, Bluetooth 6.0 LE and in-package Flash/PSRAM support
- Processor
- Single-core
- Up to 160 MHz
- SRAM
- 320 KB
- + No RTC SRAM
- GPIO
- 30
- programmable pins
- Architecture
- RISC-V
- RISC-V single-core 32-bit
Official development kit
Official Espressif board for the ESP32-C61 series.
Pins with usage restrictions
Not every pin on the ESP32-C61 is free for general-purpose use. 12 of them have conditions: occupied by memory, sampled during boot, or function as input only. Check before finalizing your schematic.
Strapping pins (boot mode)
5 pins- GPIO3
- GPIO4
- GPIO8
- GPIO9
- GPIO7
The chip samples the logic level of these pins during reset to determine the boot mode. You can use them after booting, but external circuitry must not force the wrong level during reset, or the board will fail to boot or enter download mode unexpectedly.
Flashing and debugging
6 pins- GPIO3
- GPIO4
- GPIO5
- GPIO6
- GPIO10
- GPIO11
These are the flashing UART and JTAG lines. They can still be used as GPIO, but reusing them removes the ability to flash and debug the board without disconnecting connected peripherals.
Native USB
2 pins- GPIO12
- GPIO13
Connected by default to the internal USB Serial/JTAG controller. Using them as GPIO requires disabling this peripheral, which also removes direct USB flashing.
Must not float
4 pins- CHIP_PU
- GPIO3
- GPIO4
- GPIO8
Require a defined hardware logic level: external pull-up or RC delay circuit. Leaving them floating causes random resets or unstable boot behavior.
These groups are derived from the same data as the pinout diagram. There you can see every pin's full functions, power domain, and complete engineering notes.
Open pinout diagramProcessor
- Architecture
- RISC-V single-core 32-bit
- Cores
- 1 (Single-core)
- Frequency
- Up to 160 MHz
- ULP Coprocessor
- No
- AI Accelerators
- No
Connectivity
- Wi-Fi
- Wi-Fi 6 (802.11ax) 2.4 GHz
- Bluetooth
- Bluetooth 5 (LE) (Bluetooth Core 6.0 certified)
- Zigbee/Thread
- No
- Matter
- Yes (via Wi-Fi)
- Ethernet
- No
- CAN
- No
Tools and availability
- Minimum ESP-IDF
- v5.5.2
- Arduino Core
- Yes (1 board definition in official core)
- Debugging
- Integrated JTAG via USB (no external probe required)
- Package
- QFN40 (5×5 mm) or LGA40 (5×5 mm)
- Available Modules
- ESP32-C61-MINI-1, ESP32-C61-WROOM-1
Security
- AES
- No
- SHA
- SHA-1/224/256
- RSA / MPI
- No
- ECC (elliptic curves)
- Yes (P-192, P-256)
- Hardware ECDSA
- Yes (deterministic mode, RFC 6979)
- HMAC
- No
- Digital Signature (DS)
- No
- Key Manager
- No
- Random Generator (TRNG)
- Yes (hardware TRNG)
- Flash Encryption
- XTS-AES-128
- Secure Boot
- V2 (ECDSA)
- DPA Protection
- Yes
Memory
- SRAM
- 320 KB
- RTC SRAM
- No
- ROM
- 256 KB
- External Flash
- Up to 16 MB via QSPI (models with 4 MB or 8 MB integrated in package)
- External PSRAM
- Up to 16 MB via QSPI (models with 2 MB or 8 MB integrated in package)
Power consumption
Typical values at 3.3 V and 25 °C. Actual power consumption depends on radio duty cycle and configured clock frequency.
- Active Mode
- 240-360 mA (TX)
- Light Sleep
- 50-200 µA
- Deep Sleep
- 10 µA
Peripherals
- GPIO
- 30
- ADC
- 1x 12-bit SAR ADC, up to 4 channels
- DAC
- No
- Touch
- No
- UART
- 3
- SPI
- 3 (2 for Flash/PSRAM, 1 for general use)
- I2C
- 1
- I2S
- 1
- PWM
- LED PWM (up to 6 channels)
- USB
- 1 (USB Serial/JTAG)
Special interfaces
- SDIO
- 1 (SDIO 2.0 Slave)
- Temperature Sensor
- 1 (internal)
Temperature limits
- Operating
- -40°C to 105°C
- Storage
- -40°C to 150°C
Ready to prototype with ESP32-C61?
Explore development boards available for this series, with USB, onboard sensors, and official store links.