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RISC-V single-core 32-bit (HP) + RISC-V single-core (LP)

ESP32-C6

Advanced security features, Wi-Fi 6, Bluetooth 6.0, Zigbee and Thread with Matter support

Processor
Single-core
Up to 160 MHz
SRAM
512 KB
+ 16 KB RTC SRAM
GPIO
30
programmable pins
Architecture
RISC-V
RISC-V single-core 32-bit (HP) + RISC-V single-core (LP)

Official development kit

Development board ESP32-C6

Official Espressif board for the ESP32-C6 series.

Pins with usage restrictions

Not every pin on the ESP32-C6 is free for general-purpose use. 18 of them have conditions: occupied by memory, sampled during boot, or function as input only. Check before finalizing your schematic.

Connected to flash/PSRAM memory

6 pins
  • SPICS0 · GPIO24
  • SPIQ · GPIO25
  • SPIWP · GPIO26
  • SPIHD · GPIO28
  • SPICLK · GPIO29
  • SPID · GPIO30

Already connected to the memory where firmware is stored and executed. Using them as general-purpose GPIO typically crashes the chip or corrupts execution. In modules with internal flash, they are not brought out to the package pins.

Strapping pins (boot mode)

3 pins
  • GPIO8
  • GPIO9
  • GPIO15

The chip samples the logic level of these pins during reset to determine the boot mode. You can use them after booting, but external circuitry must not force the wrong level during reset, or the board will fail to boot or enter download mode unexpectedly.

Flashing and debugging

6 pins
  • MTMS · GPIO4
  • MTDI · GPIO5
  • MTCK · GPIO6
  • MTDO · GPIO7
  • U0TXD · GPIO16
  • U0RXD · GPIO17

These are the flashing UART and JTAG lines. They can still be used as GPIO, but reusing them removes the ability to flash and debug the board without disconnecting connected peripherals.

Native USB

2 pins
  • GPIO12
  • GPIO13

Connected by default to the internal USB Serial/JTAG controller. Using them as GPIO requires disabling this peripheral, which also removes direct USB flashing.

Must not float

1 pin
  • CHIP_PU

Require a defined hardware logic level: external pull-up or RC delay circuit. Leaving them floating causes random resets or unstable boot behavior.

These groups are derived from the same data as the pinout diagram. There you can see every pin's full functions, power domain, and complete engineering notes.

Open pinout diagram

Processor

Architecture
RISC-V single-core 32-bit (HP) + RISC-V single-core (LP)
Cores
1 (Single-core HP) + 1 (Single-core LP)
Frequency
Up to 160 MHz
ULP Coprocessor
Yes (RISC-V, 20 MHz LP CPU)
AI Accelerators
No

Connectivity

Wi-Fi
Wi-Fi 6 (802.11ax) 2.4 GHz
Bluetooth
Bluetooth 5 (LE) (Bluetooth 5.3 certified)
Zigbee/Thread
IEEE 802.15.4 (Zigbee 3.0, Thread 1.3)
Matter
Yes
Ethernet
No
CAN
No

Tools and availability

Minimum ESP-IDF
v5.1
Arduino Core
Yes (21 board definitions in official core)
Debugging
Integrated JTAG via USB (no external probe required)
Package
QFN40 (5×5 mm) and QFN32 (5×5 mm)
Available Modules
ESP32-C6-MINI-1, ESP32-C6-WROOM-1

Security

AES
AES-128/256
SHA
SHA-1/224/256
RSA / MPI
Yes (RSA/MPI up to 3072 bits)
ECC (elliptic curves)
Yes (P-192, P-256)
Hardware ECDSA
No
HMAC
Yes
Digital Signature (DS)
Yes
Key Manager
No
Random Generator (TRNG)
Yes (hardware TRNG)
Flash Encryption
XTS-AES-128
Secure Boot
V2 (RSA-3072 or ECDSA)
DPA Protection
Yes

Memory

SRAM
512 KB
RTC SRAM
16 KB
ROM
320 KB
External Flash
Up to 16 MB via QSPI
External PSRAM
No

Power consumption

Typical values at 3.3 V and 25 °C. Actual power consumption depends on radio duty cycle and configured clock frequency.

Active (Wi-Fi 6)
252-354 mA (TX)
Light Sleep
35-180 µA
Deep Sleep
7 µA

Peripherals

GPIO
30
ADC
1x 12-bit SAR ADC, up to 7 channels
DAC
No
Touch
No
UART
3 (2 UART + 1 LP UART)
SPI
3
I2C
2 (1 I2C + 1 LP I2C)
I2S
1
PWM
LED PWM (up to 6 channels), Motor PWM
USB
1 (USB Serial/JTAG)

Special interfaces

SDIO
1 (SDIO 2.0 Slave)
Temperature Sensor
1 (internal)

Temperature limits

Operating
-40°C to 105°C
Storage
-40°C to 150°C

Ready to prototype with ESP32-C6?

Explore development boards available for this series, with USB, onboard sensors, and official store links.

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