How many ESP32 series currently exist?

Currently, the Espressif ecosystem features 12 primary series: classic ESP32, ESP32-S2, ESP32-S3, ESP32-S31, ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-P4, ESP32-H2, and ESP32-H4.

What are the latest series from Espressif?

The newest series include the ESP32-P4 (high-performance dual-core RISC-V at 400 MHz), the ESP32-C5 (first dual-band 2.4/5 GHz Wi-Fi chip from Espressif), and the ESP32-C61 (cost-effective Wi-Fi 6 and Bluetooth 6).

32-bit RISC-V high-performance (HP) dual-core + low-power (LP) single-core

ESP32-P4

High performance with dual-core RISC-V processor at 400 MHz, AI accelerators and rich media interfaces

Official datasheet Programming guide Technical reference manual

Processor: Dual-core; Up to 400 MHz (HP, rev v3.x; 360 MHz in v1.x); LP up to 40 MHz
SRAM: 768 KB; + 32 KB RTC SRAM
GPIO: 55; programmable pins
Architecture: RISC-V; 32-bit RISC-V high-performance (HP) dual-core + low-power (LP) single-core

Official development kit

Official Espressif board for the ESP32-P4 series.

Pins with usage restrictions

Not every pin on the ESP32-P4 is free for general-purpose use. 18 of them have conditions: occupied by memory, sampled during boot, or function as input only. Check before finalizing your schematic.

Connected to flash/PSRAM memory

6 pins

FLASH_CS
FLASH_Q
FLASH_WP
FLASH_HOLD
FLASH_CK
FLASH_D

Already connected to the memory where firmware is stored and executed. Using them as general-purpose GPIO typically crashes the chip or corrupts execution. In modules with internal flash, they are not brought out to the package pins.

Strapping pins (boot mode)

5 pins

GPIO34
GPIO35
GPIO36
GPIO37
GPIO38

The chip samples the logic level of these pins during reset to determine the boot mode. You can use them after booting, but external circuitry must not force the wrong level during reset, or the board will fail to boot or enter download mode unexpectedly.

Flashing and debugging

4 pins

GPIO2
GPIO3
GPIO4
GPIO5

These are the flashing UART and JTAG lines. They can still be used as GPIO, but reusing them removes the ability to flash and debug the board without disconnecting connected peripherals.

Native USB

2 pins

GPIO24
GPIO25

Connected by default to the internal USB Serial/JTAG controller. Using them as GPIO requires disabling this peripheral, which also removes direct USB flashing.

Must not float

1 pin

CHIP_PU

Require a defined hardware logic level: external pull-up or RC delay circuit. Leaving them floating causes random resets or unstable boot behavior.

These groups are derived from the same data as the pinout diagram. There you can see every pin's full functions, power domain, and complete engineering notes.

Open pinout diagram

Processor

Architecture: 32-bit RISC-V high-performance (HP) dual-core + low-power (LP) single-core
Cores: 2 (Dual-core HP) + 1 (Single-core LP)
Frequency: Up to 400 MHz (HP, rev v3.x; 360 MHz in v1.x); LP up to 40 MHz
ULP Coprocessor: Yes (RISC-V, 40 MHz LP CPU)
AI Accelerators: Yes (Vector Instructions, AI accelerators)

Connectivity

Wi-Fi: No
Bluetooth: No
Zigbee/Thread: No
Matter: No
Ethernet: Yes (Integrated Ethernet MAC)
CAN: No

Tools and availability

Minimum ESP-IDF: v5.3
Arduino Core: Yes (7 board definitions in official core)
Debugging: Integrated JTAG via USB (no external probe required)
Package: QFN104 (10×10 mm)
Available Modules: No module in official catalog (bare chip only)

Security

AES: AES-128/256 with GCM
SHA: SHA-1/224/256/384/512
RSA / MPI: Yes (RSA/MPI up to 4096 bits)
ECC (elliptic curves): Yes (P-192, P-256, P-384)
Hardware ECDSA: Yes (deterministic mode, RFC 6979)
HMAC: Yes
Digital Signature (DS): Yes
Key Manager: Yes
Random Generator (TRNG): Yes (hardware TRNG)
Flash Encryption: XTS-AES-128/256
Secure Boot: V2 (RSA-3072 or ECDSA)
DPA Protection: No

Memory

SRAM: 768 KB
RTC SRAM: 32 KB
ROM: 128 KB (HP ROM) + 16 KB (LP ROM)
External Flash: Up to 128 MB via QSPI/Octal SPI
External PSRAM: 16 MB or 32 MB integrated in package (OPI/HPI, 1.8 V)

Power consumption

Typical values at 3.3 V and 25 °C. Actual power consumption depends on radio duty cycle and configured clock frequency.

Active Mode: 15-150 mA (40 a 400 MHz, depending on load)
Light Sleep: 75-800 µA
Deep Sleep: 12 µA

Peripherals

GPIO: 55
ADC: 2x 12-bit SAR ADC, up to 14 channels
DAC: No
Touch: Yes (capacitive touch sensor)
UART: 6 (5 UART + 1 LP UART)
SPI: 3
I2C: 3 (2 I2C + 1 LP I2C)
I2S: 4 (3 I2S + 1 LP I2S)
PWM: LED PWM (up to 8 channels), Motor PWM (6 channels)
USB: USB 2.0 High-Speed OTG + USB 2.0 Full-Speed OTG + USB Serial/JTAG

Special interfaces

LCD: 8/16/24-bit LCD interface
Camera: 8/16-bit DVP interface
MIPI CSI: MIPI CSI camera interface
MIPI DSI: MIPI DSI display interface
SDIO: 1 SD/MMC Host controller (SDHOST)
Temperature Sensor: 1 (internal)

Temperature limits

Operating: -40°C to 85°C
Storage: -40°C to 150°C

Ready to prototype with ESP32-P4?

Explore development boards available for this series, with USB, onboard sensors, and official store links.

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