ESP32-S31
High-performance dual-core RISC-V processor at 320 MHz with Wi-Fi 6, Bluetooth 5.4 and Classic, Zigbee/Thread, Matter and AI acceleration
- Processor
- Dual-core
- Up to 320 MHz
- SRAM
- 512 KB (HP SRAM)
- + 32 KB (LP SRAM) RTC SRAM
- GPIO
- 60
- programmable pins
- Architecture
- RISC-V
- RISC-V dual-core 32-bit (HP) + RISC-V single-core (LP)
Official development kit
Official Espressif board for the ESP32-S31 series.
Pins with usage restrictions
Not every pin on the ESP32-S31 is free for general-purpose use. 7 of them have conditions: occupied by memory, sampled during boot, or function as input only. Check before finalizing your schematic.
Strapping pins (boot mode)
2 pins- GPIO60
- GPIO61
The chip samples the logic level of these pins during reset to determine the boot mode. You can use them after booting, but external circuitry must not force the wrong level during reset, or the board will fail to boot or enter download mode unexpectedly.
Flashing and debugging
4 pins- GPIO54
- GPIO55
- GPIO56
- GPIO57
These are the flashing UART and JTAG lines. They can still be used as GPIO, but reusing them removes the ability to flash and debug the board without disconnecting connected peripherals.
Must not float
1 pin- CHIP_PU
Require a defined hardware logic level: external pull-up or RC delay circuit. Leaving them floating causes random resets or unstable boot behavior.
These groups are derived from the same data as the pinout diagram. There you can see every pin's full functions, power domain, and complete engineering notes.
Open pinout diagramProcessor
- Architecture
- RISC-V dual-core 32-bit (HP) + RISC-V single-core (LP)
- Cores
- 2 (Dual-core HP) + 1 (Single-core LP)
- Frequency
- Up to 320 MHz
- ULP Coprocessor
- Yes (RISC-V, 40 MHz LP CPU)
- AI Accelerators
- Yes (Custom AI and DSP extension XespV)
Connectivity
- Wi-Fi
- Wi-Fi 6 (802.11ax) 2.4 GHz
- Bluetooth
- Bluetooth 5.4 LE and Bluetooth Classic
- Zigbee/Thread
- IEEE 802.15.4 (Zigbee 3.0, Thread 1.4)
- Matter
- Yes
- Ethernet
- No
- CAN
- Yes (CAN FD Controller)
Tools and availability
- Minimum ESP-IDF
- v6.1 in preview; official support starting from v6.1.1
- Arduino Core
- Not yet supported by arduino-esp32 core
- Debugging
- Integrated JTAG via USB (no external probe required)
- Package
- QFN80 (8×8 mm)
- Available Modules
- ESP32-S31-WROOM-1, ESP32-S31-WROOM-3
Security
- AES
- AES-128/256 with GCM
- SHA
- SHA-1/224/256/384/512
- RSA / MPI
- Yes (RSA/MPI up to 4096 bits)
- ECC (elliptic curves)
- Yes (P-192, P-256, P-384)
- Hardware ECDSA
- Yes (deterministic mode, RFC 6979)
- HMAC
- Yes
- Digital Signature (DS)
- Yes
- Key Manager
- Yes
- Random Generator (TRNG)
- Yes (hardware TRNG)
- Flash Encryption
- XTS-AES-128/256
- Secure Boot
- V2 (RSA-3072)
- DPA Protection
- Yes
Memory
- SRAM
- 512 KB (HP SRAM)
- RTC SRAM
- 32 KB (LP SRAM)
- ROM
- 320 KB
- External Flash
- Up to 256 MB via QSPI
- External PSRAM
- 16 MB or 32 MB octal DDR, in-package only (NRV16, NRV32)
Power consumption
Typical values at 3.3 V and 25 °C. Actual power consumption depends on radio duty cycle and configured clock frequency.
- Active Mode
- Configurable optimized high-performance consumption
- Light Sleep
- 0.1-0.8 mA
- Deep Sleep
- Low power with active LP CPU
Peripherals
- GPIO
- 60
- ADC
- 2x 12-bit SAR ADC, up to 16 channels
- DAC
- Yes (2x 10-bit DAC and 2x 12-bit DAC)
- Touch
- 14 capacitive channels
- UART
- 5 (4 UART + 1 LP UART)
- SPI
- 7 (6 SPI + 1 LP SPI)
- I2C
- 3 (2 I2C + 1 LP I2C)
- I2S
- 2
- PWM
- LED PWM (up to 8 channels), Motor PWM (MCPWM)
- USB
- 1 (USB 2.0 High-Speed OTG and USB Serial/JTAG)
Special interfaces
- SDIO
- 1 (SDIO Host 3.0)
- Temperature Sensor
- 1 (internal)
Temperature limits
- Operating
- -40°C to 85°C
- Storage
- -40°C to 150°C
Ready to prototype with ESP32-S31?
Explore development boards available for this series, with USB, onboard sensors, and official store links.