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RISC-V single-core 32-bit

ESP32-C3

Ultra-low-power RISC-V processor

Processor
Single-core
Up to 160 MHz
SRAM
400 KB
+ 8 KB RTC SRAM
GPIO
22
programmable pins
Architecture
RISC-V
RISC-V single-core 32-bit

Official development kit

Development board ESP32-C3

Official Espressif board for the ESP32-C3 series.

Pins with usage restrictions

Not every pin on the ESP32-C3 is free for general-purpose use. 18 of them have conditions: occupied by memory, sampled during boot, or function as input only. Check before finalizing your schematic.

Connected to flash/PSRAM memory

6 pins
  • SPIHD · GPIO12
  • SPIWP · GPIO13
  • SPICS0 · GPIO14
  • SPICLK · GPIO15
  • SPID · GPIO16
  • SPIQ · GPIO17

Already connected to the memory where firmware is stored and executed. Using them as general-purpose GPIO typically crashes the chip or corrupts execution. In modules with internal flash, they are not brought out to the package pins.

Strapping pins (boot mode)

3 pins
  • GPIO2
  • GPIO8
  • GPIO9

The chip samples the logic level of these pins during reset to determine the boot mode. You can use them after booting, but external circuitry must not force the wrong level during reset, or the board will fail to boot or enter download mode unexpectedly.

Flashing and debugging

6 pins
  • MTMS · GPIO4
  • MTDI · GPIO5
  • MTCK · GPIO6
  • MTDO · GPIO7
  • U0RXD · GPIO20
  • U0TXD · GPIO21

These are the flashing UART and JTAG lines. They can still be used as GPIO, but reusing them removes the ability to flash and debug the board without disconnecting connected peripherals.

Native USB

2 pins
  • GPIO18
  • GPIO19

Connected by default to the internal USB Serial/JTAG controller. Using them as GPIO requires disabling this peripheral, which also removes direct USB flashing.

Must not float

1 pin
  • CHIP_EN

Require a defined hardware logic level: external pull-up or RC delay circuit. Leaving them floating causes random resets or unstable boot behavior.

These groups are derived from the same data as the pinout diagram. There you can see every pin's full functions, power domain, and complete engineering notes.

Open pinout diagram

Processor

Architecture
RISC-V single-core 32-bit
Cores
1 (Single-core)
Frequency
Up to 160 MHz
ULP Coprocessor
No
AI Accelerators
No

Connectivity

Wi-Fi
IEEE 802.11 b/g/n (2.4 GHz, up to 150 Mbps)
Bluetooth
Bluetooth 5 (LE) and Bluetooth Mesh
Zigbee/Thread
No
Matter
No
Ethernet
No
CAN
No

Tools and availability

Minimum ESP-IDF
v4.3
Arduino Core
Yes (29 board definitions in official core)
Debugging
Integrated JTAG via USB (no external probe required)
Package
QFN32 (5×5 mm) and QFN28 (4×4 mm)
Available Modules
ESP32-C3-MINI-1, ESP32-C3-WROOM-02

Security

AES
AES-128/256
SHA
SHA-1/224/256
RSA / MPI
Yes (RSA/MPI up to 3072 bits)
ECC (elliptic curves)
No
Hardware ECDSA
No
HMAC
Yes
Digital Signature (DS)
Yes
Key Manager
No
Random Generator (TRNG)
Yes (hardware TRNG)
Flash Encryption
XTS-AES-128
Secure Boot
V2 (RSA-3072), starting from rev v0.3 (ECO3)
DPA Protection
No

Memory

SRAM
400 KB
RTC SRAM
8 KB
ROM
384 KB
External Flash
Up to 16 MB via QSPI
External PSRAM
No

Power consumption

Typical values at 3.3 V and 25 °C. Actual power consumption depends on radio duty cycle and configured clock frequency.

Active (CPU 160MHz)
20 mA
Active (Wi-Fi TX Peak)
335 mA
Modem Sleep (CPU 160MHz)
16-28 mA
Light Sleep
130 µA
Deep Sleep
5 µA

Peripherals

GPIO
22
ADC
2x 12-bit SAR ADC, up to 6 channels
DAC
No
Touch
No
UART
2
SPI
3 (SPI0/1 for Flash, SPI2 for general use)
I2C
1
I2S
1
PWM
LED PWM (up to 6 channels)
USB
1 (USB Serial/JTAG)

Special interfaces

Temperature Sensor
1 (internal)

Temperature limits

Operating
-40°C to 105°C (85°C on ESP32-C3FN4)
Storage
-40°C to 150°C

Ready to prototype with ESP32-C3?

Explore development boards available for this series, with USB, onboard sensors, and official store links.

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